This invention relates to high voltage, amplifier output stage circuitry which is capable of high speed, low cost, and ease of manufacturing. Current art, high voltage D.C. coupled amplifiers are designed with output stages which are composed of multiple High Voltage semiconductor devices, such as High Voltage (H.V.) MOSFET transistors which are connected to fixed H.V. supplies using a cascode configuration. The cascode configuration allows H.V. MOSFET devices to add each of their voltage capabilities to produce a higher amplifier output stage voltage capability which is well beyond the voltage capability of any single MOSFET device comprised in the cascode string connection. For example, the use of, let's say, fifty MOSFET devices each capable of 1 kilovolt drain to source voltage break down limit, could be cascoded to produce a single ended output stage capable of 50 kilovolts output relative to ground potential or a bipolar output of plus or minus 25 kilovolts (50 kilovolts peak-to-peak) relative to ground potential. Of course, the same would be applicable to a unipolar implementation and although bipolar implementations are shown below, it should be understood that the invention is applicable to unipolar implementions.
This is a well-known, conventional technique for producing high voltage capability output stages for D.C. coupled H.V. amplifier systems.
FIG. 1 illustrates such a conventional prior art H.V. amplifier output stage configuration 10 using H.V. MOSFET devices. As shown, three H.V. MOSFET devices Q1 are cascoded on each side of the amplifier output terminal 12 and connected at a positive side input line 13 to a (+) H.V. fixed supply 14 and connected at a negative side input line 15 to a (−) H.V. fixed supply 16 to produce a bipolar output capability with a substantially −H.V. to +H.V. output voltage. The H.V. MOSFET devices Q1 may be depletion or enhancement mode power MOSFETs. Linear opto-coupler L1 with H.V. isolation controls the current in a positive side cascode string 17 while linear opto-coupler L2 controls the current in a negative side cascode string 18. In both cases (L1 and L2) an increase in the opto-coupler input diode current results in an increase of the current in the opto-coupler's transistor output into the respective source terminal of the first MOSFET device (Q1) in each of the cascode strings. These increased L1 or L2 currents propagate up the respective cascode string to increase the current in all Q1 devices of the positive output or negative output to increase the current at the output terminal. In this way, the control of the L1 or L2 input diode current from ground referenced low voltage circuitry controls the H.V. output current.
To control the voltage division between each Q1 stage in the respective cascode strings 17, 18, a string of equal value resistors R1 are used to divide the voltage between the output terminal and the (+) H.V. supply as well as the voltage between the (−) H.V. supply and the output terminal. The resistance value depends on the magnitude of the voltage of +H.V. and −H.V. to hold the R1 dissipation to for instance about one-half Watt. The nodes between the resistors in the resistor string also provide the gate voltages to turn on and turn off each of the MOSFET devices Q1. The steady state current required by the Q1 gate circuitry is close to zero current for the MOSFET devices Q1, so the voltage division is adequately precise. Zener Z1 (e.g. a 10V Zener diode) and capacitor C (e.g., 0.1 microfarad) are used to limit the collector voltage on the opto-coupler transistor to prevent breakdown of the transistor device inside the opto-coupler device. If the required linear output current variations at the output, as generated by the L1 and L2 opto-couplers, need to vary relatively slowly over time, this prior art configuration will work well.
However, if increased speed of output current variations is required due to increased frequency response requirements, this prior art system will not operate well and, in some cases, will produce component failure in the Q1 MOSFET devices. This is due to the impedance level of the Q1 gate drive, which is based upon the value of the resistors in the resistor string connected to the gate circuits of the Q1 MOSFET devices, which in the case shown in FIG. 1 is approximately 500 kiloohms as produced by the R1's connected as shown. Whereas, statically, the current required by the Q1 MOSFET devices is practically zero, dynamically, a current is required to be delivered by the resistive string to charge and discharge the capacitance associated with the gate at each of the Q1 MOSFET devices. This input capacitance consists of Cgs, the gate to source capacitance and Cdg the drain to gate capacitance. These two capacitances, appearing in parallel, need to be driven by the approximate 500 kiloohm source impedance. As the capacitance value of Cgs is approximately 200 picofarads and the Cds value is approximately 25 picofarads, there is a fairly low roll-off in the frequency response of the output stage of the system of FIG. 1. In addition, due to the rather large value of the drain to gate voltage variation,
      dV    DG    dta current term of
  i  =            CdV      DG        dt  is produced where
      dV    DG    dtis the time rate change of the drain-gate voltage, C is the drain to gate capacitance, with i being the resulting current which opposes that current being delivered into the gate from the resistive string. These factors add to cause a rather low speed, low frequency linear response of this output stage of FIG. 1 of around a few hundred hertz. This low frequency response characteristic causes a time-lag in each stage in the cascode string which produces an accumulative time-lag effect in successive Q1 stages up the cascode strings causing those stages closest to the L1-L2 opto-coupler devices to turn on before those MOSFET stages higher up in their respective strings. This causes an uneven voltage distribution across the cascode string leading to excessive voltage generated on the Q1 devices which have not yet had the opportunity to turn on. This causes excessive voltage to be generated between the drain and source of those devices as a result. This causes voltage break down of those devices due to operation outside of their safe operating area (SOA) ratings when operating at higher frequencies.
To help alleviate this higher frequency voltage breakdown problem, lower value of resistance in the gate resistor string could be used. However, as the gate resistor string moves to lower values of resistance, power dissipation in the string rises, leading to excessive heat generation and increased cost of the cooling equipment needed to prevent excessive temperature rise.
In current art designs using cascoded output stages, the number of separate H.V. MOSFET stages in the cascode string, as controlled by a L1 or L2 linear optocoupler device, is limited to approximately 10 to 15 stages in order to limit the accumulative time-lag effect which leads to voltage breakdown of MOSFET devices higher up on the string as described above. The control of the following 10 to 15 stages up the string is then provided by another L1 or L2 device whose input diode is placed in parallel (electrically) with the original L1 or L2 devices. This produces a number of subsets of 10 to 15 MOSFETS per subset. The number of subsets of 10 to 15 MOSFETS stages would then be provided to accommodate the total voltage stress produced across either the positive going or negative going cascode strings (i.e. the string connected between the output and the (+) H.V. supply and the string connected between the output and (−) H.V. supply). Unfortunately, the tracking of the input/output current gain ratios of all additional paralleled L1/L2 devices used must be closely held as a function of temperature and time in order to prevent the imbalance in voltage distribution that these added L1/L2 devices are designed to prevent, thus resulting in the need to use a thermistor or other temperature sensitive devices associated with each L1 or L2 controlled subset to ensure adequate voltage tracking between subsets.
Another technique which could be used to prevent the uneven voltage distribution is to employ separate ground referenced power supplies to provide low impedance low voltage sources for each Q1 MOSFET gate circuit. However, this solution is expensive due to the number of supplies needed to supply an increased number of Q1 devices in the cascode string for higher voltages outputs. In addition, each low voltage gate supply would have to have a high voltage stand-off rating insulation to prevent destructive arc-over to ground from the gate circuitry as well as special construction to keep the capacitive loading of the gate circuitry at a minimum.